Abstract
Future wafer-based silicon solar cells will be fabricated on thin (<140 μm) wafers. However, technologies to handle thin wafers during cell processing are not yet available for industry. In this paper, a flow to handle thin wafers during rear side cell processing is developed and demonstrated on 4-in 200 μm-thick wafers. The flow involves bonding the wafers to glass after front-side processing followed by a low-temperature p-n heterojunction formation on the rear side. 2.5 × 2.5 cm2 amorphous/crystalline silicon heterojunction interdigitated back-contact solar cells are fabricated by use of lithography while bonded to glass, and they show an efficiency of up to 17.7%. Shunts, infrared light absorption, and rear side interface passivation are identified as the main efficiency losses. Dedicated experiments suggest that the passivation losses are related to the degradation of the adhesive during wafer cleaning. Hence, methods to improve the compatibility of the adhesive with the cleaning process are discussed.
| Original language | English |
|---|---|
| Article number | 6766186 |
| Pages (from-to) | 807-813 |
| Number of pages | 7 |
| Journal | IEEE Journal of Photovoltaics |
| Volume | 4 |
| Issue number | 3 |
| DOIs | |
| State | Published - May 2014 |
Keywords
- Heterojunction silicon solar cells
- interdigitated-back-contact (i-BC)
- superstrate processing
Funding Agency
- Kuwait Foundation for the Advancement of Sciences